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AS Daily A Level Physics question

2026-01-18 OCR A DC Circuits (M4) 4.3.3(c)(i) 4.3.1(d)

A student builds a potential divider with a 3.0 kΩ resistor on the top and a 6.0 kΩ resistor on the bottom across a 12 V supply of negligible internal resistance. The output V_out is taken across the 6.0 kΩ resistor. The student then connects a 6.0 kΩ device across the output (in parallel with the 6.0 kΩ resistor). Which statement is correct?

  1. A V_out remains 8.0 V because the supply is still 12 V.
  2. B V_out increases to about 10 V since the added parallel path draws more current.
  3. C V_out falls to 6.0 V because the lower arm becomes 3.0 kΩ in parallel, making the divider 3.0 kΩ:3.0 kΩ. (correct)
  4. D V_out falls to 4.0 V because the 12 V is now shared equally among three resistors.

Answer

The correct answer is C.

Correct: C — V_out falls to 6.0 V because the lower arm becomes 3.0 kΩ in parallel, making the divider 3.0 kΩ:3.0 kΩ. A ignores loading: adding 6.0 kΩ in parallel with the lower resistor reduces its effective resistance, so the output drops from the original 8.0 V. B confuses increased total current with output voltage: although total current rises, the reduced lower-arm resistance means the divider ratio decreases, so V_out falls, not rises. C matches the correct parallel reduction 6.0 kΩ || 6.0 kΩ = 3.0 kΩ, giving V_out = 12 × 3/(3 + 3) = 6.0 V. D treats the two lower resistors as series: they are in parallel, so the voltage is not split into three equal parts.

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